Computer Architecture

Provides course overview and introduces architecture, microarchitecture, and instruction set architectures. Covers machine models and ISA characteristics.

Covers basic concepts of pipeline and different types of hazards in pipelined architectures. Introduces microcoded microarchitecture.

Focuses on control hazards and introduces the motivation for caches. Covers memory technologies and their impact on computer architecture.

Examines cache characteristics and introduces basic superscalar architecture. Covers fetch logic and alignment in superscalar processors.

Addresses common issues in superscalar architecture including interrupts, bypassing, and exceptions. Introduces out-of-order processors.

Explores different architectures for out-of-order processors, including I2O2, I2O1, IO3, and IO2I processors.

Covers methods to improve out-of-order processor performance, including register renaming, memory disambiguation, and speculation.

Introduces Very Long Instruction Word (VLIW) processors, compiler optimizations, and challenges. Covers predication in VLIW architectures.

Explores methods to improve VLIW performance, including predication implementation, speculative execution, and clustered VLIWs. Includes IA-64/Itanium case study.

Covers the motivation and implementation of branch predictors. Examines static and dynamic outcome prediction, and target address prediction.

Explores advanced mechanisms to improve cache performance, including cache pipelining, write buffers, multilevel caches, victim caches, and prefetching.

Covers more advanced cache performance improvement techniques, including multiporting, banking, software memory optimizations, and non-blocking caches.

Focuses on memory management and protection, covering base and bound registers, page-based memory systems, and translation lookaside buffers (TLBs).

Introduces vector processors, their optimizations, and GPU architectures. Covers vector parallelism and hardware/software optimizations for vector processing.

Explores different types of multithreading, including coarse-grain and simultaneous multithreading. Covers SIMD processing and GPU architectures.

Introduces concepts of parallelism, consistency models, and basic parallel programming techniques. Covers sequential consistency and locks.

Explores solutions for consistency problems in parallel programming, including locks, semaphores, atomic operations, and memory fences.

Covers the implementation of small multiprocessors, focusing on bus-based systems, cache coherence protocols, and their implementation.

Explores the design of interconnects for multiprocessors, covering message passing and interconnect design principles.

Focuses on network topology, performance metrics, routing, and flow control in multiprocessor interconnects.

Covers directory protocols for coherence in large multiprocessors, including implementation, scalability, and related issues like false sharing.