FPGA Computing Systems: Partial Dynamic Reconfiguration

Marco Domenico Santambrogio is an Assistant Professor at Politecnico di Milano and a Research Affiliate at the CSAIL lab at MIT. He earned his laurea (M.Sc. equivalent) degree in Computer Engineering from Politecnico di Milano in 2004, followed by a second M.Sc. in Computer Science from the University of Illinois at Chicago (UIC) in 2005, and a Ph.D. in Computer Engineering from Politecnico di Milano in 2008. Dr. Santambrogio was a postdoctoral fellow at CSAIL, MIT, and has held visiting positions at Northwestern University and the Heinz Nixdorf Institute. He is a senior member of both IEEE and ACM, as well as a member of the IEEE Computer Society and the IEEE Circuits and Systems Society. Santambrogio has participated in various program committees for electronic design automation conferences, including DAC, DATE, and FPL. He has been affiliated with the Micro Architectures Laboratory at Politecnico di Milano since its inception, where he established the Dynamic Reconfigurability in Embedded System Design (DRESD) project in 2004. In 2011, he founded the Novel, Emerging Computing System Technologies Laboratory (NECSTLab), combining the MicroLab and VPLab, and continues to lead this innovative research facility.